1. Field of the Invention
The present invention relates to an apparatus for testing a counter circuit such as a prescaler which is included in an integrated circuit (IC).
2. Description of the Related Art
A prior art IC tester for a counter circuit includes a pattern memory which stores a test pattern and an expected pattern. The counter circuit is driven by using the test pattern, and as a result, the output pattern obtained from the counter circuit is compared with the expected pattern. Thus, a determination of whether the counter circuit is normal or abnormal is made based on whether or not the obtained output pattern coincides with the expected patter.
In the above-mentioned prior art tester, however, in order to initially phase the output pattern with the expected pattern, a reset element has to be provided within the counter circuit, which increases the number of terminal (pads), thus enlarging the size of the counter circuit. Also, since such a reset element within the counter circuit serves as a relatively large load on the counter circuit, it is impossible to drive the counter circuit at a high speed.